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Digilent DIO2 User Manual

Page 13

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Digilab DIO2 Reference Manual

Digilent, Inc.

www.digilentinc.com

page 13 of 19

Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners.


The VGA controller circuit
must generate the HS and VS
timings signals and coordinate
the delivery of video data based
on the pixel clock. The pixel
clock defines the time available
to display 1 pixel of
information. The VS signal
defines the “refresh” frequency
of the display, or the frequency
at which all information on the
display is redrawn. The
minimum refresh frequency is
a function of the display’s
phosphor and electron beam
intensity, with practical refresh
frequencies falling in the 60Hz
to 120Hz range. The number of
lines to be displayed at a given
refresh frequency defines the
horizontal “retrace” frequency.

For a 640-pixel by 480-row
display using a 25MHz pixel
clock and 60 +/-1Hz refresh,
the following signal timings can be derived. Timings for sync pulse width and front and back porch
intervals (porch intervals are the pre- and post-sync pulse times during which information cannot be
displayed) are based on observations taken from VGA displays.


VGA Signal Timing

T

S

T

disp

T

pw

T

fp

T

bp

T

S

T

disp

T

pw

T

fp

T

bp

Sync pulse time

Display time

VS pulse width

VS front porch

VS back porch

16.7ms

15.36ms

64 us

320 us

928 us

416,800

384,000

1,600

8,000

23,200

521

480

2

10

29

Symbol

Parameter

Time

Clocks Lines

Vertical Sync

32 us

25.6 us

3.84 us

640 ns

1.92 us

800

640

96

16

48

Clocks

Horizontal Sync

Time


A VGA controller circuit decodes the output of a horizontal-sync counter driven by the pixel clock to
generate HS signal timings. This counter can be used to locate any pixel location on a given row.
Likewise, the output of a vertical-sync counter that increments with each HS pulse can be used to
generate VS signal timings, and this counter can be used to locate any given row. These two
continually running counters can be used to form an address into video RAM. No time relationship

Current
through
horizontal
defletion
coil

Stable current ramp - information
displayed during this time

Retrace - no
information
displayed
during this
time

Total horizontal time

Horizontal display time

Horizontal sync signal
sets retrace frequency

retrace time

time

HS

"back porch"

"front porch"

VGA display

surface

640 pixels are displayed each time
the beam travels across the screen

pixel 0,639

pixel 0,0

pixel 479,0

pixel 479,639