7 internal clock option switches, 1 tbl/norm switch, 2 clk/ext switch – CANOGA PERKINS 2240 Fiber Optic Modem User Manual
Page 39: Internal clock option switches, Tbl/norm switch, Clk/ext switch
Chapter 3 Mode and Rate Selection
Internal Clock Option Switches
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NOTE: The 2240 can be made to use the TT signal for realigning the data by
turning ON the CLK/EXT switch on the main board. This switch is position
7 of the internal options switches, as illustrated in Figure 2-1 and Figure 3-
4. It is set to the OFF position when shipped from the factory.
3.7 Internal Clock Option Switches
There are two switches on the Internal switch block which affect the operation of the Clock
circuits: TBL/NORM and CLK/EXT (see Figure 2-1 and Figure 3-4 for the locations of these
switches).
3.7.1 TBL/NORM Switch
The TBL/NORM switch controls the Data Rate Table as indicated in Table 3-4.
It is configured as ON when shipped from the factory. If it is switched to OFF, the alternate Divide
Ratios become active.
Factory setting: ON
3.7.2 CLK/EXT Switch
The CLK/EXT switch controls which clock is used for synchronous input. If it is switched to ON,
any mode which sources Send Timing (Internal or Slave) will use a turned-around clock coming
in on Terminal Timing from the user's equipment. This compensates for round-trip delays in the
sourced clock which could otherwise shift the clock-data phasing of the transmit signal and cause
errors. This setting can only be used where leads for both are available, and if the user's
equipment can turn the Send Timing back around onto the Terminal Timing leads, either
internally or at the other end of the cable.
NOTE: The ON setting of the CLK/EXT switch is required for operating redundant
modems using either internal or slave clocking.
NOTE: On standalone models, these switches can only be accessed after the top
cover has been removed. The cover is fastened by screws on the sides of
the case. If the modem is mounted in a 2202 Modem Shelf, it must first be
Table 3-6. Delay Time Through Model 2240 at Sub-DSO Rates
Sampled External
Clock Frequency
Delay
2.4 KHz
417 ms
4.8 KHz
208 ms
9.6 KHz
104 ms
19.2 KHz
52 ms
38.4 KHz
26 ms
56 KHz
18 ms
64 KHz
16 ms