Cirrus Logic EP7309 User Manual
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DS507F2
Copyright Cirrus Logic, Inc. 2011
(All Rights Reserved)
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EP7309
High-Performance, Low-Power System on Chip
Table of Contents
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Processor Core - ARM720T ..................................................................................................................................6
Power Management ..............................................................................................................................................6
MaverickKey™ Unique ID .....................................................................................................................................6
Memory Interfaces .................................................................................................................................................6
Digital Audio Capability .........................................................................................................................................6
Universal Asynchronous Receiver/Transmitters (UARTs) .....................................................................................6
Digital Audio Interface (DAI) ..................................................................................................................................7
CODEC Interface ..................................................................................................................................................7
SSI2 Interface ........................................................................................................................................................7
Synchronous Serial Interface ................................................................................................................................8
LCD Controller .......................................................................................................................................................8
Interrupt Controller ................................................................................................................................................8
Real-Time Clock ....................................................................................................................................................8
PLL and Clocking ..................................................................................................................................................9
DC-to-DC converter interface (PWM) ....................................................................................................................9
Timers ...................................................................................................................................................................9
General Purpose Input/Output (GPIO) ..................................................................................................................9
Hardware debug Interface .....................................................................................................................................9
Internal Boot ROM ...............................................................................................................................................10
Packaging ............................................................................................................................................................10
Pin Multiplexing ...................................................................................................................................................10
System Design .................................................................................................................................................... 11
Absolute Maximum Ratings .................................................................................................................................12
Recommended Operating Conditions .................................................................................................................12
DC Characteristics ..............................................................................................................................................12
Static Memory Single Read Cycle .............................................................................................................16
Static Memory Single Write Cycle ..............................................................................................................17
Static Memory Burst Read Cycle ...............................................................................................................18
Static Memory Burst Write Cycle ...............................................................................................................19
SSI1 Interface ......................................................................................................................................................20
SSI2 Interface ......................................................................................................................................................21
LCD Interface ......................................................................................................................................................22
JTAG Interface ....................................................................................................................................................23
208-Pin LQFP Package Characteristics ..............................................................................................................24
208-Pin LQFP Package Specifications ......................................................................................................24
208-Pin LQFP Pin Diagram .......................................................................................................................25
208-Pin LQFP Numeric Pin Listing ............................................................................................................26
256-Ball PBGA Package Specifications ....................................................................................................29
256-Ball PBGA Pinout (Top View)) ............................................................................................................30