Analog Devices EZ-KIT Lite ADSP-21364 - Manual (Page 76)

ADSP-21364 EZ-KIT Lite Evaluation System Manual I-3
INDEX
P
package contents, 1-2
parallel flash memory, See flash memory
parallel port (PP)
boot mode, 2-3 , 2-12
connections, 1-8 , 1-11 , 2-3
control signals, 2-7
PMCTL register, 2-3
power
connector (J7), 2-18
LED (LED10), 2-14
supply, 1-2 , 2-18
PPFLG bits, 1-8 , 1-11
push buttons
See also switches by name (SWx)
diagram of locations,
1-10 , 2-13
R
R79-80 resistors, 2-2
RCA connectors, xi , 1-9 , 2-5
registration, of this product, 1-3
reset
processor (LED9), 2-14
push button (SW5), 2-15
restrictions, of the licence, 1-7
S
sample rates, 1-8
schematic, of this EZ-KIT Lite, B-1
serial peripheral interface, See SPI
setup, of this EZ-KIT Lite,
1-3
signal routing units (SRUs), 1-9 , 2-5
S/PDIF
connectors (J8-9), 2-18
receivers, 1-9
SPI
connections, 2-6
disable switch (SW8), 2-11
flash memory, 1-7 , 2-6 , 2-7
header (P2), 2-19
master boot mode, 2-3 , 2-12
port, 1-8 , 1-9
slave boot mode, 2-12
SRAM
configuration, 1-7
via parallel port, 2-3
startup, of this EZ-KIT Lite, 1-5
SW10 (boot mode/clock ratio) switch, 2-3 , 2-12
SW11 (loop-back test) switch, 2-13
SW1-2 (FLAG1-2) push buttons, 1-10 , 2-7 ,
2-11 , 2-15
SW3-4 (DAI19-20) push buttons, 1-10 , 2-11 ,
2-15
SW5 (reset) push button, 2-15
SW6 (microphone) switch, 1-9 , 2-9
SW7 (AD1835A) switch, 2-10
SW8 (SPI disable) switch, 2-6 , 2-11
SW9 (push button enable) DIP switch, 1-3 ,
1-10 , 2-11 , 2-15
switches
See also switches by name (SWx)
diagram of locations,
2-9
synchronous random access memory, See SRAM
SYSCTL register,
1-8 , 1-11
system architecture, of this EZ-KIT Lite, 2-2
T
time-division multiplexed (TDM) mode, 1-8
two-wire interface (TWI) mode, 1-8
U
U24, LED latch, 2-11