Rainbow Electronics DS2181A - Manual (Page 19)

DS2181A
041995 19/32
RECEIVE MULTIFRAME BOUNDARY TIMING Figure 17
RNEG,
RPOS
LSB MSB
LSB MSB LSB MSB
TIMESLOT 0
FRAME 0
FRAME 15 FRAME 0
LSB MSB
TIMESLOT 1
RCLK
MSB
TIMESLOT 31 TIMESLOT 0
RFSYNC 1
RCHCLK
RMSYNC 4 ,
RCSYNC
RAF 2
RSER 3
NOTES:
1. Low-high transitions on RMSYNC and RFSYNC occur one RCLK period early with respect to actual frame
and multiframe boundaries.
2. RAF transitions on true frame boundaries.
3. Delay from RPOS, RNEG to RSER is six RCLK periods.
4. RMSYNC and RCSYNC transition low on the falling edge of RFSYNC.