Rainbow Electronics T89C5115 - Manual (Page 91)

91
T89C5115
4128A–8051–04/02
Table 67. IPH1 Register
IPH1 (S:F7h)
Interrupt high priority Register 1
Reset Value = xxxx xx0xb
7 6 5 4 3 2 1 0
- - - - - - PADCH -
Bit
Number
Bit
Mnemonic Description
7 -
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6 -
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5 -
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4 -
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3 -
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2 -
Reserved
The value read from this bit is indeterminate. Do not set this bit.
1 PADCH
ADC Interrupt Priority level most significant bit
PADCH PADCL
Priority level
0 0 Lowest
0 1
1 0
1 1 Highest
0 -
Reserved
The value read from this bit is indeterminate. Do not set this bit.