Automatic address recognition – Rainbow Electronics T89C5115 User Manual

Page 43

T89C5115

4128A–8051–04/02

valid stop bits cannot clear the FE bit. When the FE feature is enabled, RI rises on the
stop bit instead of the last data bit (See Figure 20 and Figure 21).

Figure 20. UART Timing in Mode 1

Figure 21. UART Timing in Modes 2 and 3

Automatic Address
Recognition

The automatic address recognition feature is enabled when the multiprocessor commu-
nication feature is enabled (SM2 bit in SCON register is set).

Implemented in the hardware, automatic address recognition enhances the multiproces-
sor communication feature by allowing the serial port to examine the address of each
incoming command frame. Only when the serial port recognizes its own address will the
receiver set the RI bit in the SCON register to generate an interrupt. This ensures that
the CPU is not interrupted by command frames addressed to other devices.

If necessary, you can enable the automatic address recognition feature in mode 1. In
this configuration, the stop bit takes the place of the ninth data bit. Bit RI is set only when
the received command frame address matches the device’s address and is terminated
by a valid stop bit.

To support automatic address recognition, a device is identified by a given address and
a broadcast address.

Note:

The multiprocessor communication and automatic address recognition features cannot
be enabled in mode 0 (i.e. setting SM2 bit in SCON register in mode 0 has no effect).

Data byte

SMOD0=X

Stop

bit

Start

bit

RXD

SMOD0=1

SMOD0=0

Data byte

Ninth

bit

Stop

bit

Start

bit

RXD

SMOD0=1