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Rainbow Electronics T89C5115 User Manual

Page 67

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67

T89C5115

4128A–8051–04/02

Figure 30. PCA Timer/Counter

The CMOD register includes three additional bits associated with the PCA.

The CIDL bit which allows the PCA to stop during idle mode.

The WDTE bit which enables or disables the WatchDog function on module 4.

The ECF bit which when set causes an interrupt and the PCA overflow flag CF in
CCON register to be set when the PCA timer overflows.

The CCON register contains the run control bit for the PCA and the flags for the PCA
timer and each module.

The CR bit must be set to run the PCA. The PCA is shut off by clearing this bit.

The CF bit is set when the PCA counter overflows and an interrupt will be generated
if the ECF bit in CMOD register is set. The CF bit can only be cleared by software.

The CCF0:1 bits are the flags for the modules (CCF0 for module0...) and are set by
hardware when either a match or a capture occurs. These flags also can be cleared
by software.

CIDL

CPS1

CPS0

ECF

It

CH

CL

16 bit up/down counter

To PCA
modules

FPca/6

FPca/2

T0 OVF

P1.2

Idle

CMOD
0xD9

WDTE

CF

CR

CCON
0xD8

CCF1

CCF0

overflow