Rainbow Electronics MAX17480 User Manual
Page 41
MAX17480
AMD 2-/3-Output Mobile Serial
VID Controller
______________________________________________________________________________________
41
Core Power-MOSFET Selection
Most of the following MOSFET guidelines focus on the
challenge of obtaining high-load-current capability
when using high-voltage (> 20V) AC adapters. Low-
current applications usually require less attention.
The high-side MOSFET (N
H
) must be able to dissipate
the resistive losses plus the switching losses at both
V
IN(MIN)
and V
IN(MAX)
. Calculate both of these sums.
Ideally, the losses at V
IN(MIN)
should be roughly equal to
losses at V
IN(MAX)
, with lower losses in between. If the
losses at V
IN(MIN)
are significantly higher than the losses
at V
IN(MAX)
, consider increasing the size of N
H
(reducing
R
DS(ON)
but with higher C
GATE
). Conversely, if the loss-
es at V
IN(MAX)
are significantly higher than the losses at
V
IN(MIN)
, consider reducing the size of N
H
(increasing
R
DS(ON)
to lower C
GATE
). If V
IN
does not vary over a
wide range, the minimum power dissipation occurs
where the resistive losses equal the switching losses.
Choose a low-side MOSFET that has the lowest possible
on-resistance (R
DS(ON)
), comes in a moderate-sized
package (i.e., one or two 8-pin SOs, DPAK, or D2PAK),
and is reasonably priced. Make sure that the DL gate dri-
ver can supply sufficient current to support the gate
charge and the current injected into the parasitic gate-to-
drain capacitor caused by the high-side MOSFET turning
on; otherwise, cross-conduction problems might occur
(see the
Core SMPS MOSFET Gate Drivers
section).
Core MOSFET Power Dissipation
Worst-case conduction losses occur at the duty factor
extremes. For the high-side MOSFET (N
H
), the worst-
case power dissipation due to resistance occurs at the
minimum input voltage:
where I
LOAD
is the per-phase current.
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
However, the R
DS(ON)
required to stay within package
power dissipation often limits how small the MOSFET
can be. Again, the optimum occurs when the switching
losses equal the conduction (R
DS(ON)
) losses. High-
side switching losses do not usually become an issue
until the input is greater than approximately 15V.
Calculating the power dissipation in the high-side
MOSFET (N
H
) due to switching losses is difficult since it
must allow for difficult quantifying factors that influence
the turn-on and turn-off times. These factors include the
internal gate resistance, gate charge, threshold voltage,
source inductance, and PCB layout characteristics. The
following switching-loss calculation provides only a very
rough estimate and is no substitute for breadboard
evaluation, preferably including verification using a
thermocouple mounted on N
H
:
:
where C
RSS
is the reverse transfer capacitance of N
H
,
I
GATE
is the peak gate-drive source/sink current (1A,
typ), and I
LOAD
is the per-phase current.
Switching losses in the high-side MOSFET can become
an insidious heat problem when maximum AC adapter
voltages are applied, due to the squared term in the C
x V
IN
2
x f
SW
switching-loss equation. If the high-side
MOSFET chosen for adequate R
DS(ON)
at low battery
voltages becomes extraordinarily hot when biased from
V
IN(MAX)
, consider choosing another MOSFET with
lower parasitic capacitance.
For the low-side MOSFET (N
L
), the worst-case power
dissipation always occurs at maximum input voltage:
The worst case for MOSFET power dissipation occurs
under heavy overloads that are greater than
I
LOAD(MAX)
, but are not quite high enough to exceed
the current limit and cause the fault latch to trip. To pro-
tect against this possibility, the circuit can be “overde-
signed” to tolerate:
where I
PEAK(MAX)
is the maximum valley current
allowed by the current-limit circuit, including threshold
tolerance and on-resistance variation. The MOSFETs
must have a good-sized heatsink to handle the over-
load power dissipation.
Choose a Schottky diode (D
L
) with a forward voltage
low enough to prevent the low-side MOSFET body
diode from turning on during the dead time. As a gen-
eral rule, select a diode with a DC current rating equal
to 1/3 the load current per phase. This diode is optional
and can be removed if efficiency is not critical.
Core Boost Capacitors
The boost capacitors (C
BST
) must be selected large
enough to handle the gate-charging requirements of
the high-side MOSFETs. Typically, 0.1µF ceramic
capacitors work well for low-power applications driving
medium-sized MOSFETs. However, high-current appli-
cations driving large, high-side MOSFETs require boost
capacitors larger than 0.1µF. For these applications,
I
I
I
I
LOAD MAX
PEAK MAX
INDUCTOR
PEAK MAX
(
)
(
)
(
=
−
=
∆
2
))
(
)
−
⎛
⎝
⎜⎜
⎞
⎠
⎟⎟
I
LIR
LOAD MAX
2
PD (N Resistive) =
L
1
−
⎛
⎝
⎜⎜
⎞
⎠
⎟⎟
⎡
⎣
⎢
V
V
OUT
IN MAX
(
)
⎢⎢
⎤
⎦
⎥
⎥
⎛
⎝
⎜
⎞
⎠
⎟
I
R
LOAD
TOTAL
DS ON
η
2
(
)
PD (N
Switching) =
H
V
C
f
I
IN MAX
RSS SW
GAT
(
)
(
)
2
E
E
LOAD
I
⎛
⎝⎜
⎞
⎠⎟
PD (N
Resistive) =
H
V
V
I
R
OUT
IN
LOAD
DS O
⎛
⎝⎜
⎞
⎠⎟
2
( N
N)