Smps design procedure, Table 6. ilim3 setting – Rainbow Electronics MAX17480 User Manual
Page 38
MAX17480
AMD 2-/3-Output Mobile Serial
VID Controller
38
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Offset and Current-Limit Setting
for NB SMPS (ILIM3)
The offset and current-limit settings of the NB SMPS
can be set by the ILIM3 pin setting. Table 6 shows the
ILIM3 pin voltage levels and the corresponding settings
for the offset and current limit of the NB SMPS. The NB
offset is always present regardless of PSI_L setting.
The I
LX3MIN
minimum current-limit threshold in skip
mode is precisely 25% of the corresponding positive
current-limit threshold.
SMPS Design Procedure
Firmly establish the input voltage range and maximum
load current before choosing a switching frequency
and inductor operating point (ripple-current ratio). The
primary design trade-off lies in choosing a good switch-
ing frequency and inductor operating point, and the fol-
lowing four factors dictate the rest of the design:
• Input Voltage Range: The maximum value (V
IN(MAX)
)
must accommodate the worst-case high AC adapter
voltage. The minimum value (V
IN(MIN)
) must account for
the lowest input voltage after drops due to connectors,
fuses, and battery selector switches. If there is a choice
at all, lower input voltages result in better efficiency.
• Maximum Load Current: There are two values to
consider. The peak load current (I
LOAD(MAX)
) deter-
mines the instantaneous component stresses and fil-
tering requirements, and thus drives output capacitor
selection, inductor saturation rating, and the design
of the current-limit circuit. The continuous load cur-
rent (I
LOAD
) determines the thermal stresses and thus
drives the selection of input capacitors, MOSFETs,
and other critical heat-contributing components.
Modern notebook CPUs generally exhibit I
LOAD
=
I
LOAD(MAX)
x 80%.
For multiphase systems, each phase supports a frac-
tion of the load, depending on the current balancing.
When properly balanced, the load current is evenly
distributed among each phase:
where
η
PH
is the total number of active phases.
• Core Switching Frequency: This choice determines
the basic trade-off between size and efficiency. The
optimal frequency is largely a function of maximum
input voltage, due to MOSFET switching losses that
are proportional to frequency and V
IN
2
. The optimum
frequency is also a moving target, due to rapid
improvements in MOSFET technology that are making
higher frequencies more practical.
When selecting a switching frequency, the minimum
on-time at the highest input voltage and lowest output
voltage must be greater than the 150ns (max) mini-
mum on-time specification in the
Electrical
Characteristics
table:
V
OUT(MIN)
/V
IN(MAX)
x t
SW
> t
ON(MIN)
A good rule is to choose a minimum on-time of at
least 200ns.
When in pulse-skipping operation (PSI_L = 0), the
minimum on-time must take into consideration the
time needed for proper skip-mode operation. The on-
time for a skip pulse must be greater than the 170ns
(max) minimum on-time specification in the
Electrical
Characteristics
table:
• Inductor Operating Point: This choice provides
trade-offs between size vs. efficiency and transient
response vs. output noise. Low inductor values pro-
vide better transient response and smaller physical
size, but also result in lower efficiency and higher out-
put noise due to increased ripple current. The mini-
mum practical inductor value is one that causes the
circuit to operate at the edge of critical conduction
(where the inductor current just touches zero with
every cycle at maximum load). Inductor values lower
than this grant no further size-reduction benefit. The
optimum operating point is usually found between
20% and 50% ripple current.
t
LV
R
V
V
ON MIN
IDLE
SENSE
IN MAX
OUT MIN
(
)
(
)
(
)
≤
−
(
)
I
I
LOAD PHASE
LOAD
PH
(
)
=
η
ILIM3
PEAK CURRENT
LIMIT (A)
SKIP CURRENT
LIMIT (A)
MAX DC
CURRENT (A)
FULL-LOAD
DROOP (mV)
OFFSET
(mV)
V
CC
5.25 1.3 4.75
-26.13
12.5
GND 4.25 1.05 3.75 -20.63 12.5
Table 6. ILIM3 Setting