Figure 2-8, Board hardware, Figure 2-8: leds and lcd connectivity – Xilinx ML310 User Manual
Page 31
ML310 User Guide
31
UG068 (v1.01) August 25, 2004
1-800-255-7778
Board Hardware
R
Figure 2-8:
LEDs and LCD Connectivity
VCC3V3
SN74LVC244A
2Y1
2OE
2A2
2A3
2A4
2Y4
2Y3
2Y2
2A1
1Y1
VCCA
1OE
1A2
1A3
1A4
GND
1Y4
1Y3
1Y2
1A1
BUFFER
NON-INVERTING
LCD_RS
LCD_E
LCD_RW
LED_DONE_BUF
9
19
13
15
17
3
5
7
11
18
20
1
4
6
8
10
12
14
16
2
U33
LED_DONE
LED_PLB_ERROR
LED_OPB_ERROR
FPGA_LCD_RS
FPGA_DONE
OPB_BUS_ERROR
PLB_BUS_ERROR
4.75K
R358
FPGA_INIT
FPGA_LCD_RW
FPGA_LCD_E
LED_INIT
VCC2V5
VCC3V3
SN74LVCC3245A
GND3
GND2
GND1
A8
A7
A6
A5
A4
A3
A2
A1
DIR
VCCA
B8
B7
B6
B5
B4
B3
B2
B1
OE
NC
VCCB
VOLTAGE LEVEL
TRANSLATOR
FPGA_LCD_DIR
NC
R373
4.75K
R388
0
13
12
11
10
9
8
7
6
5
4
3
2
1
14
15
16
17
18
19
20
21
22
23
24
U35
LCD_DB7
LCD_DB6
LCD_DB5
LCD_DB4
LCD_DB3
LCD_DB2
LCD_DB1
LCD_DB0
FPGA_LCD_DB0
FPGA_LCD_DB4
FPGA_LCD_DB5
FPGA_LCD_DB6
FPGA_LCD_DB3
FPGA_LCD_DB2
FPGA_LCD_DB1
FPGA_LCD_DB7
VCC5V
15
13
12
11
9
7
1
2
3
5
6
4
8
10
14
16
J13
LCD_BLV
LCD_VLC
LCD_DB3
LCD_DB1
LCD_DB2
LCD_DB0
LCD_RW
GND
LCD_DB5
LCD_DB6
LCD_RS
LCD_DB7
LCD_E
LCD_DB4
GND
VCC3V3
SN74LVC244A
2Y1
2OE
2A2
2A3
2A4
2Y4
2Y3
2Y2
2A1
1Y1
VCCA
1OE
1A2
1A3
1A4
GND
1Y4
1Y3
1Y2
1A1
BUFFER
NON-INVERTING
9
19
13
15
17
3
5
7
11
18
20
1
4
6
8
10
12
14
16
2
U36
DBG_LED_0
DBG_LED_3
DBG_LED_2
DBG_LED_1
DBG_LED_4
DBG_LED_7
DBG_LED_6
DBG_LED_5
4.75K
R399
LCD Control
Output to Red/Green LEDs
Output to Green LEDs
LCD Data
LCD