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Pdvt (jitter) buffer, Intrinsic pdv, Pdvt buffer effect on delay – RAD Data comm TDMoIP Gateway IPmux-16 User Manual

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Chapter 1 Introduction

IPmux-16 Installation and Operation Manual

1-12 Functional Description

PDV

t

t

Packets Leaving IPmux-16

Packets Arriving

Figure 1-10. Packet Delay Variation

PDVT (Jitter) Buffer

IPmux-16 is equipped with a Packet DVT (Delay Variation Tolerance) buffer. The

PDVT buffer or jitter buffer is filled by the incoming IP packets and emptied out to
fill the E1/T1 stream. The buffer begins to empty out only after it is half full in order

to compensate for packet starvation from the Ethernet side. The time it takes for
half of the buffer to empty out is the maximum DVT time. Delay Variation

Tolerance is configurable. The PDVT (jitter) buffer is designed to compensate for
packet delay variation caused by the network.

It supports a delay variation of up to E1: 32 ms, T1: 24 ms.

To configure jitter buffer depth:
Estimated or Measured PDV introduced by the network + intrinsic PDV

(if it exists) introduced by the module as a result of configuring the
TDM bytes / frame > 48 (see explanation of calculating intrinsic PDV, below).

Intrinsic PDV

If TDM bytes/frame is greater than 48, there is an intrinsic delay variation (intrinsic

PDV). The intrinsic PDV introduced by the module is a function of n>1 in
TDM bytes/frame configuration as follows:
I.PDV (ms) = ((n – 1) x 1000) / (frames per second × n)

Where n =

48

e

bytes/fram

TDM

configured

(n=1 – 8).

PDVT Buffer Effect on Delay

The PDVT buffer is on the TDM path. This means that it adds to the total

end-to-end delay (see delay calculation, below).