SMSC LAN91C111 - Manual (Page 82)

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
Revision 1.91 (08-18-08) 82 SMSC LAN91C111 REV C
DATASHEET
9.10 Register 20. Reserved - Structure and Bit Definition
MLNKFAIL: Interrupt Mask Link
Fail Detect 1 = Mask Interrupt
For LNKFAIL In
Register 18
0 = No Mask
MLOSSSYN: Interrupt Mask
Descrambler Loss 1 = Mask Interrupt
For LOSSSYNC In
Register 18
of Synchronization
Detect 0 = No Mask
MCWRD: Interrupt Mask
Codeword Error 1 = Mask Interrupt
For CWRD In
Register 18
0 = No Mask
MSSD: Interrupt Mask Start
Of Stream Error 1 = Mask Interrupt
For SSD In Register
18
0 = No Mask
MESD: Interrupt Mask End Of
Stream Error 1 = Mask Interrupt
For ESD In Register
18
0 = No Mask
MRPOL: Interrupt Mask
Reverse Polarity
Detect 1 = Mask Interrupt
For RPOL In
Register 18
0 = No Mask
MJAB: Interrupt Mask Jabber
Detect 1 = Mask Interrupt
For JAB In Register
18
0 = No Mask
MSPDDT: Interrupt Mask 100/10
Speed Detect 1 = Mask Interrupt
For SPDDET In
Register 18
0 = No Mask
MDPLDT: Interrupt Mask Duplex
Detect 1 = Mask Interrupt
For DPLXDET In
Register 18
0 = No Mask
Reserved: Reserved Reserved for Factory
Use
Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved
RW RW RW RW RW RW RW RW
0 0 0 0 0 0 0 0