SMC Networks ARM PL241 - Manual (Page 90)

Device Driver Requirements
5-2 Copyright © 2006 ARM Limited. All rights reserved. ARM DDI 0389B
5.1 Memory initialization
Figure 5-1 on page 5-3 and Figure 5-3 on page 5-5 shows the sequence of events that a
device driver must carry out to initialize the memory controller and a memory device to
ensure the configuration of both is synchronized.
Typically, PSRAM devices can have the mode register programmed using the address
bus only. NOR flash memory devices are examples of memory that requires mode
register accesses to be carried out using a sequence of accesses using the address and
data buses. Check the data sheet for the specific memory device you are configuring to
determine the configuration method.