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Mulu, Mulu syntax, Description – Intel Extensible Firmware Interface User Manual

Page 821: Operation, Behaviors and restrictions

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EFI Byte Code Virtual Machine

Version 1.10

12/01/02

19-47

MULU

SYNTAX:

MULU[32|64] {@}R

1

, {@}R

2

{Index16|Immed16}

DESCRIPTION:

Performs an unsigned multiply of two 32-bit (MULU32) or 64-bit (MULU64) operands, and stores
the result back to Operand 1.

OPERATION:

Operand 1 <= Operand * Operand 2

Table 19-33. MULU Instruction Encoding

BYTE DESCRIPTION

Bit Description

7

0 = Operand 2 immediate/index absent

1 = Operand 2 immediate/index present

6

0 = 32-bit operation

1 = 64-bit operation

0

0..5

Opcode = 0x0F

Bit Description

7

0 = Operand 2 direct

1 = Operand 2 indirect

4..6 Operand

2

3

0 = Operand 1 direct

1 = Operand 1 indirect

1

0..2 Operand

1

2..3

Optional 16-bit immediate data/index

BEHAVIORS AND RESTRICTIONS:

• If Operand 2 is indirect, then the immediate data is interpreted as an index, and the Operand 2

value is fetched from memory as an unsigned value at address [R

2

+ Index16].

• If Operand 2 is direct, then the immediate data is considered a signed immediate value and is

added to the Operand 2 register contents such that Operand 2 = R

2

+ Immed16.

• If the instruction is MULU32 and Operand 1 is direct, then the result is written to the Operand

1 register with the upper 32 bits cleared.