Mul syntax, Description, Operation – Intel Extensible Firmware Interface User Manual
Page 820: Behaviors and restrictions

Extensible Firmware Interface Specification
19-46
12/01/02
Version 1.10
MUL
SYNTAX:
MUL[32|64] {@}R
1
, {@}R
2
{Index16|Immed16}
DESCRIPTION:
Perform a signed multiply of two operands and store the result back to Operand 1. The operands
can be either 32 bits (MUL32) or 64 bits (MUL64).
OPERATION:
Operand 1 <= Operand * Operand 2
Table 19-32. MUL Instruction Encoding
BYTE DESCRIPTION
Bit Description
7
0 = Operand 2 immediate/index absent
1 = Operand 2 immediate/index present
6
0 = 32-bit operation
1 = 64-bit operation
0
0..5
Opcode = 0x0E
Bit Description
7
0 = Operand 2 direct
1 = Operand 2 indirect
4..6 Operand
2
3
0 = Operand 1 direct
1 = Operand 1 indirect
1
0..2 Operand
1
2..3
Optional 16-bit Operand 2 immediate data/index
BEHAVIORS AND RESTRICTIONS:
• If Operand 2 is indirect, then the immediate data is interpreted as an index, and the Operand 2
value is fetched from memory as a signed value at address [R
2
+ Index16].
• If Operand 2 is direct, then the immediate data is considered a signed immediate value and is
added to the Operand 2 register contents such that Operand 2 = R
2
+ Immed16.
• If the instruction is MUL32, and Operand 1 is direct, then the result is stored to Operand 1
register with the upper 32 bits cleared.