Intel Extensible Firmware Interface - Manual (Page 435)

Protocols — PCI Bus Support
Version 1.10 12/01/02 12-17
Description
This function provides a standard way to poll a PCI memory location. A PCI memory read
operation is performed at the PCI memory address specified by
Address for the width specified
by Width . The result of this PCI memory read operation is stored in Result . This PCI memory
read operation is repeated until either a timeout of Delay 100 ns units has expired, or ( Result &
Mask) is equal to Value .
This function will always perform at least one PCI memory read access no matter how small
Delay may be. If Delay is zero, then Result will be returned with a status of EFI_SUCCESS
even if Result does not match the exit criteria. If Delay expires, then EFI_TIMEOUT
is returned.
If Width is not EfiPciWidthUint8 , EfiPciWidthUint16 , EfiPciWidthUint32 , or
EfiPciWidthUint64 , then EFI_INVALID_PARAMETER is returned.
The memory operations are carried out exactly as requested. The caller is responsible for satisfying
any alignment and memory width restrictions that a PCI Root Bridge on a platform might require.
For example on some platforms, width requests of
EfiPciWidthUint64 are not supported.
All the PCI transactions generated by this function are guaranteed to be completed before this
function returns. However, if the memory mapped I/O region being accessed by this function has
the
EFI_PCI_ATTRIBUTE_MEMORY_CACHED attribute set, then the transactions will follow the
ordering rules defined by the processor architecture.
Status Codes Returned
EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
EFI_INVALID_PARAMETER Width is invalid.
EFI_INVALID_PARAMETER Result is NULL .
EFI_TIMEOUT Delay expired before a match occurred.
EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.