Intel MD566X - Manual (Page 4)

56K V.92 Data, Fax, and Voice Chipset
4 Intel Confidential Programmer’s Guide
DRAM dynamic random-access memory
EPROM electrically programmable read-only memory
FIFO first in/first out
HDLC high-level data link control
ISA industry standard architecture
LSB least-significant bit
MSB most-significant bit
NVRAM non-volatile random-access memory
PPP point-to-point protocol
RAM random-access memory
ROM read-only memory
R/W read/write
SDLC synchronous data link control
SQFP shrink quad flat pack
SRAM static random-access memory
TTL transistor-transistor logic
UART universal asynchronous receiver transmitter
VQFP very-tight-pitch quad flat pack
Acronyms
Acronym Definition (Continued)