FUJITSU C145-C037-01EN - Manual (Page 57)

5-9
Table 5.2 Parallel interface signals (continued)
Connector
pin
number
4
5
6
7
8
9
10
11
12
13
14
15
16
Description
This signal goes low under the following printer
conditions:
(1) Offline
(2) Paper out
(3) Cover open
(4) Other printer error
Reverse data transfer phase:
This signal is set low when the printer is ready to
send data to the host. During the data transfer, it is
used as data bit 0 (LSB), then data bit 4.
Reverse idle phase:
This signal is used to indicate that data is available.
This signal goes high if paper runs out.
Reverse data transfer phase:
Data bit 2, then data bit 6
Reverse idle phase:
This signal is set high until the host requests data
and, after that, follows the Data Available signal.
• Data 1 to Data 8 signals correspond to parallel
data bits 1 to 8.
• Data 8 is the most significant bit.
• All signals must go high at least 0.5
µ
s before
the falling edge of the Data Strobe signal, and
must stay high for at least 0.5
µ
s after the rising
edge.
Reserved (*1)
• Strobe pulse for reading data (Data 1 to Data 8).
The printer reads data when this signal is low.
• The pulse width must be 0.5
µ
s or more at the
printer’s receiving terminal.
This signal is set high when the host requests the
reverse data transfer phase (nibble mode).
Reserved (*1)
This signal goes high to cause the printer to enter the
reverse data transfer phase (nibble mode).
Signal
Compati mode
Nibble mode
Fault
Data Available
Paper Empty (PE)
Ack Data Req
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
Data 8
Input Prime
(IN PRM)
Data Strobe
(DSTB)
Host Clock
(Select In)
1284 Active
Direction
Output
Output
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Return
line pin
number
22
23
24
25
26
27
28
29
30
31
32
33
34