FUJITSU MCE3130AP User Manual
Page 120
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C156-E142-02EN
When the DISP (Disable Media Access until Power cycle) bit is 1, the ODD responds with Not
Ready for any command from the host until power-off or hardware reset. The ODD doesn't
support DISP function.
When the SWPP (Software Write Protect until Power-down) is 1, media is write-protected. The
ODD doesn't support SWPP function.
The DISP bit and SWPP bit can be saved.
Table 4.68 Changeable values for the timer & protect page
Bit
Byte
7
6
5
4
3
2
1
0
2
00h
3
0h
Fh
4
000000b
0
0
5-7
00h
Table 4.69 Default values for the timer & protect page
Bit
Byte
7
6
5
4
3
2
1
0
2
00h
3
0h
Fh
4
000000b
0
0
5-7
00h