FUJITSU MCE3130AP User Manual
Page 112
4 - 44
C156-E106-02EN
4.6.5.1 Drive operation mode page
Table 4.51 Drive operation mode page
Bit
Byte
7
6
5
4
3
2
1
0
0
PS
0
Page Code (00h)
1
Page Length (02h)
2
SLM
SLR
DVW
Reserved
3
Reserved
DDE
Reserved
When the DVW (Disable Verify for WRITE) bit is 0, verification is made for the WRITE (10),
WRITE (12), or WRITE AND VERIFY command. When the bit of DVW is 1, no verification is
made.
The SLM (Select LUN Mode) bit and the SLR (Select LUN for Rewritable) bit has no multiple
LUNs and are always 0.
The DDE (Disable Deferred Error) bit indicates whether errors in the write cache are reported.
These errors are reported as deferred error with the next command regardless of the value of the
bit.
The drive operation mode page can be saved.
Table 4.52 Changeable values in drive operation mode page
Bit
Byte
7
6
5
4
3
2
1
0
2
0
0
1
00000b
3
000b
1
0000b
Table 4.53 Default values for the drive operation mode page
Bit
Byte
7
6
5
4
3
2
1
0
2
0
0
0
00000b
3
000b
1
0000b