Endura RADISYS KP915GV User Manual
Page 103

KP915GV Product Manual
103
POST Code
Description
23h
Check validity of RTC value: e.g. a value of 5Ah is an invalid value for RTC
minute.
Load CMOS settings into BIOS stack. If CMOS checksum fails, use default
value instead.
Prepare BIOS resource map for PCI & PnP use. If ESCD is valid, take into
consideration of the ESCD’s legacy information.
Onboard clock generator initialization.
Disable respective clock resource to empty PCI & DIMM slots.
Early PCI initialization:
-Enumerate PCI bus number
-Assign memory & I/O resource
-Search for a valid VGA device & VGA BIOS, and put it into C000:0.
27h
Initialize INT 09 buffer
29h
Program CPU internal MTRR (P6 & PII) for 0-640K memory address. Initialize
the APIC for Pentium class CPU. Program early chipset according to CMOS
setup. Example: onboard IDE controller. Measure CPU speed. Invoke video
BIOS.
2Dh
Initialize multi-language Put information on screen display, including Award
title, CPU type, CPU speed
3Ch Test
8254
3Eh
Test 8259 interrupt mask bits for channel 1.
40h
Test 8259 interrupt mask bits for channel 2.
43h
Test 8259 functionality.
47h
Initialize EISA slot
49h
Calculate total memory by testing the last double word of each 64K page.
Program writes allocation for AMD K5 CPU.
4Eh
Program MTRR of M1 CPU Initialize L2 cache for P6 class CPU & program
CPU with proper cacheable range. Initialize the APIC for P6 class CPU. On MP
platform, adjust the cacheable range to smaller one in case the cacheable
ranges between each CPU are not identical.
50h Initialize
USB
52h
Test all memory (clear all extended memory to 0)
55h
Display number of processors (multi-processor platform)
57h
Display PnP logo Early ISA PnP initialization -Assign CSN to every ISA PnP
device.
59h
Initialize the combined Trend Anti-Virus code.
5Bh
(Optional Feature) Show message for entering AWDFLASH.EXE from FDD
(optional)
5Dh
Initialize Init_Onboard_Super_IO switch.
Initialize Init_Onboard_AUDIO switch.
60h
Okay to enter Setup utility; i.e. not until this POST stage can users enter the
CMOS setup utility.
65h
Initialize PS/2 Mouse
67h
Prepare memory size information for function call: INT 15h ax=E820h
69h
Turn on L2 cache
6Bh
Program chipset registers according to items described in Setup & Auto-
configuration table.
6Dh
Assign resources to all ISA PnP devices.
6Fh
Initialize floppy controller