Sundance SMT950 - Manual (Page 48)

Version 2.0 Page 48 of 52 SMT950 User Manual
Block of registers
This implements what has previously been described in this document.
Space available in FPGA
This is the summary provided by Xilinx ISE 7.1.04i regarding the amount of
resources required by the default FPGA design – this is targeting a Virtex4
XC4VSX35.
Figure 19 - Space available in FPGA