Sundance SMT950 - Manual (Page 43)

Version 2.0 Page 43 of 52 SMT950 User Manual
DAC (DAC5687) Register 0x0 – 0x30
For more details, refer to DAC5687 datasheet.
DAC (DAC5687) Register 0x0 – 0x30
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 sleep_dac
a
sleep_dacb hpla Hplb unused version[2:0]
Default ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘011’
1 pll_div[1:0] pll_freq pll_kv interp[1:0] inv_plllock fifo_bypass
Default ‘00 ‘0’ ‘0’ ‘00’ ‘0’ ‘0’
DAC (DAC5687) Register 0x1 – 0x31
For more details, refer to DAC5687 datasheet.
DAC (DAC5687) Register 0x1 – 0x31
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 qflag interl dual_clk Twos rev_abus rev_bbus fir_bypass full_bypass
Default ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’
1 nco nco_gain qmc cm_mode[3:0] invsinc
Default ‘1’ ‘0’ ‘0’ ‘0000’ ‘0’
DAC (DAC5687) Register 0x2 – 0x32
For more details, refer to DAC5687 datasheet.
DAC (DAC5687) Register 0x2 – 0x32
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 sif_4pin dac_ser_dat
a
half_rate Unused usb counter_mode[2:0]
Default ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘000’
1 sync_phst
r
sync_nco sync_cm sync_fifo[2:0] unused unused
Default ‘0’ ‘0’ ‘0’ ‘000’ ‘0’ ‘0’
DAC (DAC5687) Register 0x3 – 0x33
For more details, refer to DAC5687 datasheet.
DAC (DAC5687) Register 0x3 – 0x33
Byte Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
0 dac_data[7:0]
Default ‘00000000’
1 dac_data[15:8]
Default ‘00000000’