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3 functional description, 1 block diagram, 2 module description – Sundance SMT942 User Manual

Page 10: Figure 1 - smt942 block diagram

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User Manual SMT942

Last Edited: 23/08/2011 17:25:00

3 Functional Description

3.1 Block Diagram

SLB Base Module (In this case SMT351T)

SMT942 (SLB Mezzanine Module)

Virtex-5

XC5VLX50T, SX50T, SX95T, LX110T

FF1136 Package

Channel A

Signal

Conditioning

(AC-coupling)

Channel B

Signal

Conditioning

(AC-coupling)

DAC Output

Ch A MMCX

50-Ohm

DAC Output

Ch B MMCX

50-Ohm

Daughter Card

interface

connector

SLB

RSLA

ADC ChannelA and

ChannelB

RSLB

DAC ChannelA and

ChannelB

Top and Bottom TIM

Connectors

ChA Data (16)
and Control

Data and Clocks

4xComports (0,1,3 and 4)

DAC5688

Dual Channel DAC

16-bit 800MSPS

Interpolation

(1.3W)

Channel C

Signal

Conditioning

(AC-coupling)

Channel D

Signal

Conditioning

(AC-coupling)

DAC Output

Ch C MMCX

50-Ohm

DAC Output

Ch D MMCX

50-Ohm

DAC5688

Dual Channel DAC

16-bit 800MSPS

Interpolation

(1.3W)

Power

Daughter Card

connector

SLB

ChD Data (16)
and Control

ChC Data (16)
and Control

Bank A

2.5V

Bank B

2.5V

Bank C

2.5V

Power

Supplies: 1.8
and 3.3 Volts

(Linear

Regulators)

Power

Supplies: 1.0,

1.2, 1.8, 2.5

and 3.3 Volts

External Trigger

Clock Synchronizer

and Jitter Cleaner

based on

CDCE72010

(1.8W)

DACs External Clock In

- MMCX

External Reference

Clock In - MMCX

FPGA Clock

ChB Data (16) and
Control

DACs External Clock

Out - MMCX

Data and Clocks

Figure 1 - SMT942 Block diagram.


3.2 Module Description


The SMT943 has got 2 dual channel DACs (

DAC5688

– Texas Instrument) that have

integrated 2x-8x interpolation filters, a fine frequency mixer with a 32-bit complex
numerically controlled oscillator, an on-board clock multiplier, an IQ compensation
and an internal voltage reference.
A clock distribution chip ensures that all converters sample synchronously to a
single clock source. The clock source can be external or internal (on-board 245.76-
MHz VCXO). The distribution chip also allows synchronising the on-board VCXO to a
reference signal that can be external or internal (on-board 10-MHz crystal). External
reference, external sampling clock input and output are accessible on MMCX
connectors. An external trigger input is also available on the board.
All control, data and clock lines are mapped onto an SLB connector so the card can
be fully controlled by an SLB FPGA base module (SMT351T for example).
Some green LEDs are available on the board. A group of four LEDs is driven directly
from the SLB base FPGA module and can be used to return status bits. Other
indivudual LEDs should be lit and show that local power supplies are on.