Zilog EZ80L92 - Manual (Page 23)

eZ80L92 Development Kit
User Manual
UM012913-0407 Operational Description
19
Almost all the connectors’ signals are received directly from the CPU.
Four input signals, in particular, offer options to the application developer
by disabling certain functions of the eZ80L92 Module.
These four inputs signals are:
•
Disable Ethernet (DIS_ETH)
•
Enable Flash (EN_FLASH)
•
Flash Write Enable (FlashWE)
•
Disable IrDA (DIS_IrDA)
41 CS3 Input Low Yes
42 DIS_IrDA Output Low No
43 RESET Bidirectional Low Yes
44 WAIT Output Pull-Up 10 K
Ω
; Low Yes
45 V
DD
46 GND
47 HALT_SLP Input Low Yes
48 NMI Output Low Yes
49 V
DD
50 Reserved
Table 3. eZ80Acclaim! ® Development Platform I/O Connector Identification—JP2 1
Pin No. Symbol Signal Direction Active Level eZ80L92 Signal 2
Notes:
1. For the sake of simplicity in describing the interface, Power and Ground nets are omitted from
this table. The interface is represented in the eZ80L92 Module Schematics.
2. The Power and Ground nets are connected directly to the eZ80L92 device.