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Ez80l92 development kit user manual – Zilog EZ80L92 User Manual

Page 20

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eZ80L92 Development Kit
User Manual

Operational Description

UM012913-0407

16

I/O Connector

Figure 7

illustrates the pin layout of the I/O Connector in the 50-pin

header located at position JP2 of the eZ80Acclaim!

®

Development Plat-

form.

Table 3

describes the pins and their functions.

Figure 7. eZ80Acclaim!

®

Development Platform I/O Connector Pin Configuration—

JP2

PB1

PB3

PB5

PB7

PC1

PC3

PC5

PC7

GND_EXT

PD1

PD3

PD5

PD7

DIS_IRDA

CS3

EZ80CLK

V3.3_EXT

FLASHWE

NMI

WAIT

GND_EXT

PB0

PB2

PB4

PB6

GND_EXT

PC2

PC4

RTC_VDD

PD0

PD2

PD4

PD6

GND_EXT

IICSCL
IICSDA

TDI

TDO

TRIGOUT

TCK

TMS

RESET

GND_EXT

HALT_SLP

V3.3_EXT

PC6

PC0

JP2

HEADER 25X2

IDC50

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50