Pilz PSS67 F 16DI SB-T - Manual (Page 19)

Operating Manual: PSS67 F 16DI SB-T 4 - 3
Two behaviour modes can be configured in the software’s configurator:
• “default”:
The signal changes are not registered.
• “Fast”:
Each signal change is temporarily stored in a FIFO telegram buffer. Once
the confirmation telegram arrives, the module sends consecutive event
telegrams for each detected signal change from the FIFO telegram buffer.
Test pulse outputs/24 VDC pins
The four test pulse outputs T
0
to T
3
may only be used for test pulses or as
24 VDC outputs.
The test pulse outputs are suitable for testing the wiring of input devices.
All safety-related inputs must operate in accordance with the failsafe
principle (on switching off).
Two test pulses are available on each plug-in connector; these test pulses
are permanently assigned to the inputs. The assignment of the test pulses
to the inputs cannot be changed in the system software’s configurator.
If the test pulse outputs are not being used, they can be configured as
24 VDC pins in the system software’s configurator (default setting).
Internal wiring diagram
The diagram on page 4-4 shows an internal wiring diagram of the
PSS67 F 16DI SB-T.