Toshiba Equium 8000 S-D - Manual (Page 69)

User's Manual Specifications A-1
Version
1
Last Saved on 22/09/00 09:50
Equium 8000 User's Manual – A-APEND.DOC – ENGLISH – Printed on 22/09/00 as AA_800UK
Appendix A
Specifications
This appendix describes the Toshiba Equium 8000S specifications and
build-to-order (BTO) options available at the time this user’s guide was
published.
Processor
Processor (options) Intel Pentium lll with 256 KB level 2 cache: 733,
800, 866, 933MHz, 1GHz
Intel Celeron with 128 KB level 2 cache: 600,
633, 667, 700, 733, 766mhz
Level 1 cache 32 KB: (16 KB code; 16 KB data)
Bus speed 66/100/133 MHz front side bus
LSI and CMOS Large scale integrated and complementary
metaloxide semiconductor technology.
Memory
Base memory
(options) 64, 128, or 256 MB SDRAM
Maximum 512 MB (256MBx 2)
Sockets 3 DIMM sockets total, 2 DIMM sockets available
(64/128/256 MB SDRAM DIMM).
Memory bus speed 100 MHz (with Celeron),
133 MHz (with Pentium lll).