Cirrus Logic CS5467 - Manual (Page 40)

CS5467
40 DS714F3
9. SYSTEM CALIBRATION
9.1 Calibration
The CS5467 provides DC offset and gain calibration
that can be applied to the voltage and current measure-
ments, and AC offset calibration which can be applied to
the voltage and current RMS calculations.
Since the voltage and current channels have indepen-
dent offset and gain registers, offset and gain calibra-
tion can be performed on any channel independently.
The data flow of the calibration is shown in Figure 10 .
The CS5467 must be operating in its active state and
ready to accept valid commands. Refer to
7.6 Com-
mands on page 25.
The value in the Cycle Count register (N) determines
the number of output word rate (OWR) samples that are
averaged during a calibration. DC offset and gain cali-
brations take at least N + T
SETTLE
samples. AC offset
calibrations take at least 6(N) + T
SETTLE
samples. As N
is increased, the accuracy of calibration results tends to
also increase.
The DRDY bit in the Status register will be set at the
completion of Calibration commands. If an overflow oc-
curs during calibration, other Status register bits may be
set as well.
9.1.1 Offset Calibration
During offset calibrations, no line voltage or current
should be applied to the meter. A zero-volt differential
signal can also be applied to the voltage inputs VIN1

VIN2 or current inputs IIN1 (IIN2of the CS5467.
(see
Figure 11 .)
9.1.1.1 DC Offset Calibration
The DC Offset Calibration command measures and av-
erages DC values read on specified voltage or current
channels at zero input and stores the inverse result in
the associated offset registers. This will be added to in-
stantaneous measurements in subsequent conver-
sions, removing the offset.
Gain registers for channels being calibrated should be
set to 1.0 prior to performing DC offset calibration.
9.1.1.2 AC Offset Calibration
The AC Offset Calibration command measures the re-
sidual RMS values read on specified voltage or current
channels at zero input and stores the inverse result in
the associated AC offset registers. This will be added to
RMS measurements in subsequent conversions, re-
moving the offset.
AC offset registers for channels being calibrated should
first be cleared prior to performing the calibration.
In Modulator + X
V1, I1, V2, I2
Filter
N
I1
RMS
, V1
RMS
,
I2
RMS
, V2
RMS

I1
DCOFF
, V1
DCOFF
,
I2
DCOFF
, V2
DCOFF
I1
GAIN
, V1
GAIN
,
I2
GAIN
, V2
GAIN
0.6
+
= READABLE/WRITABLE REGISTERS.
N
 + X
  N
1
DC
AVG
RMS
I1
ACOFF
, V1
ACOFF
,
I2
ACOFF
, V2
ACOFF
 N
+
DC Gain
DC Offset
AC Offset
RMS
AC Gain
Negate
DC AVG
Negate
Figure 10. Calibration Data Flow
+
-
XGAIN
+
-
External
Connections
0V +
-
AIN+
AIN-
CM + -
Figure 11. System Calibration of Offset