Cirrus Logic CS5374 - Manual (Page 36)

CS5374
CS5374
36
9.2 AMP1CFG: 0x01
(MSB)7 6 5 4 3 2 1 (LSB)0
PWDN1 HP1 MUX1_1 MUX1_0 GUARD GAIN1_2 GAIN1_1 GAIN1_0
R/W R/W R/W R/W R/W R/W R/W R/W
0 0 0 0 0 0 0 0
Figure 21. Amplifier 1 Configuration Register AMP1CFG
Bit definitions:
7 PWDN1 Amplifier 1 Power Down
1: enable
0: disable
6 HP1 Amplifier 1 High Precision
1: enable
0: disable
5:4 MUX1[1:0] Input Multiplexer
11: INA1 + INB1
10: INA1 only
01: INB1 only
00: 800 ohm termination
3 GUARD GUARD Output
1: disable
0: enable
2:0 GAIN1[2:0] Amplifier 1 Gain
111: reserved
110: 64x
101: 32x
100: 16x
011: 8x
010: 4x
001: 2x
000: 1x
Address: 0x01
-- Not defined
(read as 0)
R Readable
W Writable
R/W Readable
and Writable
Bits in bottom rows
are reset condition
Reset Condition : 0000_0000 (0x00) : Default value
Normal Operation : 00MM_GGGG : MUX, GUARD and GAIN select
Power Down Operation : 1000_0000 (0x80) : PWDN enabled