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A.7 *opc — operation complete command, Figure a-1. gpib commands, Gure a-1.) – KEPCO BIT 4886 Operator Manual User Manual

Page 65: A-1.), Figure a-1.), Re a-1

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BIT 4886 120413

A-3

A.7

*OPC — OPERATION COMPLETE COMMAND

*OPC

Syntax:

*OPC

Description: Causes power supply to set status bit 0 (Operation Complete) when pending operations are

complete This command sets Standard Event Status Register bit 0 (see Table A-2) to “1” when all pre-
vious commands have been executed and changes in output level have been completed. This com-
mand does not prevent processing of subsequent commands, but bit 0 will not be set until all pending
operations are completed. (1 = set = enable function, 0 = reset = disable function). (See example, Fig-
ure A-1.) As an example, the controller sends command(s), then sends *OPC. If controller then sends
*ESR?, the power supply responds with either a “0” (if the power supply is busy executing the pro-
grammed commands), or a “1” (if the previously programmed commands are complete). (See exam-
ple, Figure A-1.)

FIGURE A-1. GPIB COMMANDS

*CLS

Power supply clears status data.

*ESE 60

Power supply enables bits 5, 4, 3 and 2, allowing command error, execution
error, device dependent error and query error to set the Event Status
Summary bit when an STB command is executed.

*ESE?

Returns 60, (value of the mask) verifying that bits 5, 4, 3 and 2 are enabled.

*ES

Unknown command will set command error (Bit 5).

*ESR?

Returns 32 (bit 5 set), indicating Command Error has occurred since the last
time the register was read.

*IDN?

Power supply returns: KEPCO, BIT 4886 100-2 123456 1.8-1.8

*OPC

Allows status bit 0 to be set when pending operations complete

VOLT 21;CURR 3

Sets output voltage to 21V, output current to 3A

*ESR?

Returns 129 (128 + 1, power on, bit 7 = 1, operation complete, bit 1 = 1)

*ESR?

Returns 0 (event status register cleared by prior *ESR?)

VOLT 15;CURR 5;*ESR? Sets output voltage to 15V, output current to 5A, puts “1” on output bus when

command operations are complete.

*RST

Power supply reset to power on default state.

*SRE 40

When ESB or QUES bits are set (Table A-3), the Request for Service bit will
be set.

*SRE?

Returns the value of the mask (40).

*STB?

For example, the Power supply responds with 96 (64 + 32) if MSS and the
Event Status Byte (Table A-3) summary bit have been set. The power
supply returns 00 if no bits have been set.

VOLT 25

Power supply voltage commanded to 25V.

VOLT:TRIG 12

Programs power supply voltage to 12V when *TRG received.

INIT

Trigger event is initialized.

*TRG

Power supply reverts to commanded output voltage of 12V.
** LOAD DISCONNECTED

*TST?

Power supply executes self test and responds with 0 if test completed
successfully, with 1 if test failed.