GW Instek SFG-1000 Series - Manual (Page 32)

SFG-1000 Series User Manual
32
Logic Circuit Test
Description Use the TTL output from SFG-1000 series to test digital
circuits. Observe the timing relation of input/output
waveform using an oscilloscope.
Block diagram
Impedance Matching Network Test
Description Use SFG-1000 series for impedance matching network:
testing its frequency characteristic and matching the
impedance.
Block diagram
Test step Adjust the potentiometer until V2 becomes the half of
V1 (V2=0.5V1). Then the impedance Z of the network
becomes identical to the potentiometer.