FEC AFC1500 - Manual (Page 62)

Outputs
Spare 144 Spdl. 21 Bypassed 96 Spdl. 9 Bypassed 48
Spare 143 Spdl. 21 Abnormal 95 Spdl. 9 Abnormal 47
Spare 142 Spdl. 21 Accept 94 Spdl. 9 Accept 46
Spare 141 Spdl. 21 Reject 93 Spdl. 9 Reject 45
Spare 140 Spdl. 20 Bypassed 92 Spdl. 8 Bypassed 44
Spare 139 Spdl. 20 Abnormal 91 Spdl. 8 Abnormal 43
Spare 138 Spdl. 20 Accept 90 Spdl. 8 Accept 42
Spare 137 Spdl. 20 Reject 89 Spdl. 8 Reject 41
Spdl. 31 Bypassed 136 Spdl. 19 Bypassed 88 Spdl. 7 Bypassed 40
Spdl. 31 Abnormal 135 Spdl. 19 Abnormal 87 Spdl. 7 Abnormal 39
Spdl. 31 Accept 134 Spdl. 19 Accept 86 Spdl. 7 Accept 38
Spdl. 31 Reject 133 Spdl. 19 Reject 85 Spdl. 7 Reject 37
Spdl. 30 Bypassed 132 Spdl. 18 Bypassed 84 Spdl. 6 Bypassed 36
Spdl. 30 Abnormal 131 Spdl. 18 Abnormal 83 Spdl. 6 Abnormal 35
Spdl. 30 Accept 130 Spdl. 18 Accept 82 Spdl. 6 Accept 34
Spdl. 30 Reject 129 Spdl. 18 Reject 81 Spdl. 6 Reject 33
Spdl. 29 Bypassed 128 Spdl. 17 Bypassed 80 Spdl. 5 Bypassed 32
Spdl. 29 Abnormal 127 Spdl. 17 Abnormal 79 Spdl. 5 Abnormal 31
Spdl. 29 Accept 126 Spdl. 17 Accept 78 Spdl. 5 Accept 30
Spdl. 29 Reject 125 Spdl. 17 Reject 77 Spdl. 5 Reject 29
Spdl. 28 Bypassed 124 Spdl. 16 Bypassed 76 Spdl. 4 Bypassed 28
Spdl. 28 Abnormal 123 Spdl. 16 Abnormal 75 Spdl. 4 Abnormal 27
Spdl. 28 Accept 122 Spdl. 16 Accept 74 Spdl. 4 Accept 26
Spdl. 28 Reject 121 Spdl. 16 Reject 73 Spdl. 4 Reject 25
Spdl. 27 Bypassed 120 Spdl. 15 Bypassed 72 Spdl. 3 Bypassed 24
Spdl. 27 Abnormal 119 Spdl. 15 Abnormal 71 Spdl. 3 Abnormal 23
Spdl. 27 Accept 118 Spdl. 15 Accept 70 Spdl. 3 Accept 22
Spdl. 27 Reject 117 Spdl. 15 Reject 69 Spdl. 3 Reject 21
Spdl. 26 Bypassed 116 Spdl. 14 Bypassed 68 Spdl. 2 Bypassed 20
Spdl. 26 Abnormal 115 Spdl. 14 Abnormal 67 Spdl. 2 Abnormal 19
Spdl. 26 Accept 114 Spdl. 14 Accept 66 Spdl. 2 Accept 18
Spdl. 26 Reject 113 Spdl. 14 Reject 65 Spdl. 2 Reject 17
Spdl. 25 Bypassed 112 Spdl. 13 Bypassed 64 Spdl. 1 Bypassed 16
Spdl. 25 Abnormal 111 Spdl. 13 Abnormal 63 Spdl. 1 Abnormal 15
Spdl. 25 Accept 110 Spdl. 13 Accept 62 Spdl. 1 Accept 14
Spdl. 25 Reject 109 Spdl. 13 Reject 61 Spdl. 1 Reject 13
Spdl. 24 Bypassed 108 Spdl. 12 Bypassed 60 Current Warning 12
Spdl. 24 Abnormal 107 Spdl. 12 Abnormal 59 Spdl. in Bypass 11
Spdl. 24 Accept 106 Spdl. 12 Accept 58 Seq. 3 Selected 10
Spdl. 24 Reject 105 Spdl. 12 Reject 57 Seq. 2 Selected 9
Spdl. 23 Bypassed 104 Spdl. 11 Bypassed 56 Seq. 1 Selected 8
Spdl. 23 Abnormal 103 Spdl. 11 Abnormal 55 Seq. 0 Selected 7
Spdl. 23 Accept 102 Spdl. 11 Accept 54 End 6
Spdl. 23 Reject 101 Spdl. 11 Reject 53 Busy 5
Spdl. 22 Bypassed 100 Spdl. 10 Bypassed 52 Ready 4
Spdl. 22 Abnormal 99 Spdl. 10 Abnormal 51 Abnormal 3
Spdl. 22 Accept 98 Spdl. 10 Accept 50 Accept (Total) 2
Spdl. 22 Reject 97 Spdl. 10 Reject 49 Reject (Total) 1
Output Bit Output Bit Output Bit
Note:These outputs are programmable & may not reflect this layout in your
application
.
Chapter 4: I/O & Output Data
62