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Typical operating characteristics – Rainbow Electronics MAX1464 User Manual

Page 9

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MAX1464

Low-Power, Low-Noise Multichannel

Sensor Signal Processor

_______________________________________________________________________________________

9

Typical Operating Characteristics

(V

DD

= 5.0V, T

A

= +25°C, unless otherwise noted.)

SUPPLY CURRENT

vs. SUPPLY VOLTAGE

MAX1464 toc01

SUPPLY VOLTAGE, V

DD

(V)

SUPPLY CURRENT, I

DD

(mA)

5.3

5.1

4.7

4.9

2.30

2.35

2.40

2.45

2.50

2.55

2.60

2.65

2.25

4.5

5.5

CPU ON 2% OF TIME
ADC ON 98% OF TIME
ADC

CLK

= 1MHz

DAC1 ON
SMALL OP AMP ON

T

A

= +125°C

T

A

= +25

°C

T

A

= -40°C

SUPPLY CURRENT

vs. INTERNAL CLOCK FREQUENCY

MAX1464 toc02

INTERNAL CLOCK FREQUENCY (MHz)

SUPPLY CURRENT, I

DD

(mA)

4.5

4.0

3.5

2.25

2.30

2.35

2.40

2.45

2.50

2.55

2.60

2.65

2.70

2.20

3.0

5.0

CPU ON 2% OF TIME
ADC ON 98% OF TIME
ADC

CLK

= 1MHz

DAC1 ON
SMALL OP AMP ON

MODULE CURRENT

vs. TEMPERATURE

MAX1464 toc03

TEMPERATURE (

°C)

MODULE CURRENT (mA)

98

70

43

15

-13

0.7

0.9

1.1

1.3

1.5

1.7

1.9

2.1

2.3

2.5

0.5

-40

125

DAC + LARGE OP AMP

DAC + SMALL OP AMP

ADC

BASE

BASE OPERATING CURRENT

vs. SUPPLY VOLTAGE

MAX1464 toc04

SUPPLY VOLTAGE, V

DD

(V)

BASE OPERATING CURRENT, I

BO

(mA)

5.3

5.1

4.7

4.9

0.67

0.69

0.71

0.73

0.75

0.77

0.79

0.81

0.65

4.5

5.5

T

A

= +125°C

T

A

= +25

°C

T

A

= -40°C

ADC RATIOMETRICITY ERROR

vs. SUPPLY VOLTAGE

MAX1464 toc05

SUPPLY VOLTAGE, V

DD

(V)

ADC

RATIOMETRICITY

ERROR (%FS)

5.3

5.1

4.7

4.9

-0.03

-0.02

-0.01

0

0.01

0.02

0.03

0.04

-0.04

4.5

5.5

ADC INPUT = 0.75 x V

DD

ADC INPUT = 0.5 x V

DD

ADC INPUT = 0

ADC INPUT = -0.75 x V

DD

ADC INPUT = -0.5 x V

DD

ADC

REF

= V

DD

PGA[4:0] = 00000

ADC INL

MAX1464 toc06

1.0

0.5

-0.5

0

-1.0

INPUT VOLTAGE NORMALIZED TO FULL SCALE

ADC NONLINEARITY ERROR (%FS) -0.004

-0.002

0

0.002

0.004

0.006

-0.006

PGA[4:0] = 01000

DO

DI

SCLK

CS

t

CSS

t

CL

t

CH

t

CSH

t

SC

t

CS

t

DS

t

DH

t

DS

t

DH

t

CSI

t

CSS

t

CL

t

CH

t

SC

t

CSH

t

DO

t

TR

t

DV

t

DV

t

DO

t

TR

Figure 1. Serial Interface Timing Diagram