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Rainbow Electronics MAX1464 User Manual

Page 26

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MAX1464

Low-Power, Low-Noise Multichannel
Sensor Signal Processor

26

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CPU Cycles required:

1 cycle

Description:

Perform a 16-bit move operation from port-X to the A-
register.

The port-X contents are unchanged.

The previous contents of A-register are overwritten
and lost.

The port-X can be any of the CPU ports.

PC is incremented once to point to the next instruction
in program memory.

Two’s-complement data format is preserved.

No branching occurs.

No other registers are affected.

WRX

Write Port X

Op-code:

1110 XXXX

BINARY

EXh

Operation:

Port-X

← A-register

PC-register

← PC + 1 (point to next instruction)

CPU Cycles required:

1 cycle

Description:

Perform a 16-bit move operation from the A-register to
port-X.

The A-register contents are unchanged.

The previous contents of port-X are overwritten
and lost.

The port-X can be any of the CPU ports.

PC is incremented once to point to the next instruction
in program memory.

Two’s-complement data format is preserved.

No branching occurs.

No other registers are affected.

MLT

Multiply

Op-code:

1111 0011

BINARY

F3h

Operation:

A-register | M-register

← N-register x M-register

PC-register

← PC + 1 (point to next instruction)

CPU Cycles required:

16 cycles

Description:

Perform a 16-bit by 16-bit arithmetic multiplication of
the M-register and the N-register producing a 32-bit
result. The 32-bit result is stored in two 16-bit registers;
the A-register receives the most significant word of the
result and the M-register receives the least significant
word of the result.

The A-register must be cleared to zero (CLX A) before
executing the MLT instruction. The previous contents of
the A-register are overwritten and lost.

The previous contents of the M-register are overwritten
and lost.

The contents of the N-register are not altered.

The register op code must be 3h.

PC is incremented once to point to the next instruction
in program memory.

Two’s-complement data format is preserved.

No branching occurs.

No other registers are affected.