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Port b schematics – Rainbow Electronics AT90S8515 User Manual

Page 67

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67

AT90S8515

0841G–09/01

• AIN0 – Port B, Bit 2

AIN0: Analog Comparator Positive Input. When configured as an input (DDB2 is cleared
[zero]) and with the internal MOS pull-up resistor switched off (PB2 is cleared [zero]),
this pin also serves as the positive input of the On-chip Analog Comparator.

• T1 – Port B, Bit 1

T1: Timer/Counter1 counter source. See the timer description for further details

• T0 – Port B, Bit 0

T0: Timer/Counter0 counter source. See the timer description for further details.

Port B Schematics

Note that all port pins are synchronized. The synchronization latches are, however, not
shown in the figures.

Figure 46. Port B Schematic Diagram (Pins PB0 and PB1)

DA

T

A

BUS

D

D

Q

Q

RESET

RESET

C

C

WD

WP

RD

MOS
PULL-
UP

PBn

R

R

WP:
WD:
RL:
RP:
RD:

WRITE PORTB
WRITE DDRB
READ PORTB LATCH
READ PORTB PIN
READ DDRB

DDBn

PORTBn

SENSE CONTROL

TIMERn CLOCK
SOURCE MUX

CSn2

CSn0

RL

RP

CSn1

n:

0,1