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Port a schematics – Rainbow Electronics AT90S8515 User Manual

Page 64

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64

AT90S8515

0841G–09/01

PORTAn has to be cleared (zero) or the pin has to be configured as an output pin. The
Port A pins are tri-stated when a reset condition becomes active, even if the clock is not
active..

Note:

n: 7,6…0, pin number.

Port A Schematics

Note that all port pins are synchronized. The synchronization latch is, however, not
shown in the figure.

Figure 45. Port A Schematic Diagrams (Pins PA0 - PA7)

Table 19. DDAn Effects on Port A Pins

DDAn

PORTAn

I/O

Pull-up

Comment

0

0

Input

No

Tri-state (high-Z)

0

1

Input

Yes

PAn will source current if ext. pulled low.

1

0

Output

No

Push-pull Zero Output

1

1

Output

No

Push-pull One Output