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Xilinx MIcroblaze Development Spartan-3E 1600E User Manual

Page 87

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MicroBlaze Development Kit Spartan-3E 1600 Edition User Guide

85

UG257 (v1.1) December 5, 2007

www.xilinx.com

StrataFlash Connections

R

Table 11-1:

FPGA-to-StrataFlash Connections

Category

StrataFlash

Signal Name

FPGA Pin

Number

Function

Addr

ess

SF_A24

A11

Shared with XC2C64A CPLD. The CPLD
actively drives these pins during FPGA

configuration, as described in

Chapter 16,

“XC2C64A CoolRunner-II CPLD”

. Also

connects to FPGA user-I/O pins. SF_A24 is the

same as FX2 connector signal FX2_IO<32>.

SF_A23

N11

SF_A22

V12

SF_A21

V13

SF_A20

T12

SF_A19

V15

Connects to FPGA pins A[19:0] to support the

BPI configuration.

SF_A18

U15

SF_A17

T16

SF_A16

U18

SF_A15

T17

SF_A14

R18

SF_A13

T18

SF_A12

L16

SF_A11

L15

SF_A10

K13

SF_A9

K12

SF_A8

K15

SF_A7

K14

SF_A6

J17

SF_A5

J16

SF_A4

J15

SF_A3

J14

SF_A2

J12

SF_A1

J13

SF_A0

H17