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4example register settings – Texas Instruments TVP5147M1PFP User Manual

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Example Register Settings

83

SLES140A—March 2007

TVP5147M1PFP

4

Example Register Settings

The following example register settings are provided only as a reference. These settings, given the assumed
input connector, video format, and output format, set up the TVP5147M1 decoder and provide video output.
Example register settings for other features and the VBI data processor are not provided here.

4.1

Example 1

4.1.1 Assumptions

Input connector:

Composite (VI_1_A) (default)

Video format:

NTSC (J, M), PAL (B, G, H, I, N) or SECAM (default)

NOTE: NTSC-443, PAL-Nc, PAL-M, and PAL-60 are masked from the autoswitch process by
default. See the autoswitch mask register at address 04h.

Output format:

10-bit ITU-R BT.656 with embedded syncs (default)

4.1.2 Recommended Settings

Recommended I

2

C writes: For the given assumptions, only one write is required. All other registers are set

up by default.

I

2

C register address 08h = Luminance processing control 3 register

I

2

C data 00h = Optimizes the trap filter selection for NTSC and PAL

I

2

C register address 0Eh = Chrominance processing control 2 register

I

2

C data 04h = Optimizes the chrominance filter selection for NTSC and PAL

I

2

C register address 34h = Output formatter 2 register

I

2

C data 11h = Enables YCbCr output and the clock output

NOTE: HS/CS, VS/VBLK, AVID, FID, and GLCO are logic inputs by default. See output

formatter 3 and 4 registers at addresses 35h and 36h, respectively.

4.2

Example 2

4.2.1 Assumptions

Input connector:

S-video [VI_2_C (luma), VI_1_C (chroma)]

Video format:

NTSC (J, M, 443), PAL (B, D, G, H, I, N, Nc, 60) or SECAM (default)

Output format:

10-bit ITU-R BT.656 with discrete sync outputs

4.2.2 Recommended Settings

Recommended I

2

C writes: This setup requires additional writes to output the discrete sync 10-bit 4:2:2 data,

HS, and VS, and to autoswitch between all video formats mentioned above.