77 vdp full field enable register, 78 vdp full field mode register – Texas Instruments TVP5147M1PFP User Manual
Page 74
Functional Description
66
SLES140A—March 2007
TVP5147M1PFP
2.11.77 VDP Full Field Enable Register
Subaddress
D9h
Default
00h
7
6
5
4
3
2
1
0
Reserved
Full field enable
Full field enable:
0 = Disabled full field mode (default)
1 = Enabled full field mode
This register enables the full field mode. In this mode, all lines outside the vertical blank area and all lines in
the line mode register programmed with FFh are sliced with the definition of the VDP full field mode register
at subaddress DAh. Values other than FFh in the line mode registers allow a different slice mode for that
particular line.
2.11.78 VDP Full Field Mode Register
Subaddress
DAh
Default
FFh
7
6
5
4
3
2
1
0
Full field mode [7:0]
Full field mode [7:0]:
This register programs the specific VBI standard for full field mode. It can be any VBI standard. Individual line
settings take priority over the full field register. This allows each VBI line to be programmed independently but
have the remaining lines in full field mode. The full field mode register has the same bit definition as line mode
registers (default FFh).
Global line mode has priority over the full field mode.
2.11.79 VBUS Data Access With No VBUS Address Increment Register
Subaddress
E0h
Default
00h
7
6
5
4
3
2
1
0
VBUS data [7:0]
VBUS data [7:0]: VBUS data register for VBUS single-byte read/write transaction.
2.11.80 VBUS Data Access With VBUS Address Increment Register
Subaddress
E1h
Default
00h
7
6
5
4
3
2
1
0
VBUS data [7:0]
VBUS data [7:0]: VBUS data register for VBUS multibyte read/write transaction. VBUS address is
autoincremented after each data byte read/write.