Texas Instruments TVP5147M1PFP - Manual (Page 65)

Functional Description
57 SLES140A—March 2007 TVP5147M1PFP
2.11.54 F and V Bit Control Register
Subaddress 75h
Default 12h
7 6 5 4 3 2 1 0
Rabbit Reserved Fast lock F and V [1:0] Phase Det. HPLL
Rabbit: Enable rabbit ear
0 = Disabled (default)
1 = Enabled
Fast lock: Enable fast lock where vertical PLL is reset and a 2-second timer is initialized when vertical lock
is lost; during time-out the detected input VSYNC is output.
0 = Disabled
1 = Enabled (default)
F and V [1:0]
F and V Lines per frame F bit V bit
00 = (default) Standard ITU−R BT 656 ITU−R BT 656 00 = (default)
Nonstandard−even Forced to 1 Switch at field boundary
Nonstandard−odd Toggles Switch at field boundary
01 = Standard ITU−R BT 656 ITU−R BT 656 01 =
Nonstandard Toggles Switch at field boundary
10 = Standard ITU−R BT 656 ITU−R BT 656 10 =
Nonstandard Pulsed mode Switch at field boundary
11 = Reserved
Phase detector: Enable integral window phase detector
0 = Disabled
1 = Enabled (default)
HPLL: Enable horizontal PLL to free run
0 = Disabled (default)
1 = Enabled