Texas Instruments TMS320F2802 User Manual
Page 5
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SPRS230N – OCTOBER 2003 – REVISED MAY 2012
6-9
Warm Reset
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6-10
Example of Effect of Writing Into PLLCR Register
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6-11
General-Purpose Output Timing
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6-12
Sampling Mode
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6-13
General-Purpose Input Timing
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6-14
IDLE Entry and Exit Timing
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6-15
STANDBY Entry and Exit Timing Diagram
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6-16
HALT Wake-Up Using GPIOn
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6-17
PWM Hi-Z Characteristics
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6-18
ADCSOCAO or ADCSOCBO Timing
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6-19
External Interrupt Timing
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6-20
SPI Master Mode External Timing (Clock Phase = 0)
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6-21
SPI Master Mode External Timing (Clock Phase = 1)
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6-22
SPI Slave Mode External Timing (Clock Phase = 0)
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6-23
SPI Slave Mode External Timing (Clock Phase = 1)
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6-24
ADC Power-Up Control Bit Timing
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6-25
ADC Analog Input Impedance Model
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6-26
Sequential Sampling Mode (Single-Channel) Timing
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6-27
Simultaneous Sampling Mode Timing
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Copyright © 2003–2012, Texas Instruments Incorporated
List of Figures
5