Texas Instruments TMS320F2802 User Manual
Page 2

SPRS230N – OCTOBER 2003 – REVISED MAY 2012
Contents
1
F280x, F2801x, C280x DSPs
..................................................................................................
1.1
Features
......................................................................................................................
1.2
Getting Started
..............................................................................................................
2
Introduction
......................................................................................................................
2.1
Pin Assignments
...........................................................................................................
2.2
Signal Descriptions
........................................................................................................
3
Functional Overview
..........................................................................................................
3.1
Memory Maps
..............................................................................................................
3.2
Brief Descriptions
..........................................................................................................
3.2.1
C28x CPU
.......................................................................................................
3.2.2
Memory Bus (Harvard Bus Architecture)
....................................................................
3.2.3
Peripheral Bus
..................................................................................................
3.2.4
Real-Time JTAG and Analysis
................................................................................
3.2.5
Flash
.............................................................................................................
3.2.6
ROM
..............................................................................................................
3.2.7
M0, M1 SARAMs
...............................................................................................
3.2.8
L0, L1, H0 SARAMs
............................................................................................
3.2.9
Boot ROM
.......................................................................................................
3.2.10
Security
..........................................................................................................
3.2.11
Peripheral Interrupt Expansion (PIE) Block
.................................................................
3.2.12
External Interrupts (XINT1, XINT2, XNMI)
..................................................................
3.2.13
Oscillator and PLL
..............................................................................................
3.2.14
Watchdog
........................................................................................................
3.2.15
Peripheral Clocking
.............................................................................................
3.2.16
Low-Power Modes
..............................................................................................
3.2.17
Peripheral Frames 0, 1, 2 (PFn)
..............................................................................
3.2.18
General-Purpose Input/Output (GPIO) Multiplexer
.........................................................
3.2.19
32-Bit CPU-Timers (0, 1, 2)
...................................................................................
3.2.20
Control Peripherals
.............................................................................................
3.2.21
Serial Port Peripherals
.........................................................................................
3.3
Register Map
...............................................................................................................
3.4
Device Emulation Registers
..............................................................................................
3.5
Interrupts
....................................................................................................................
3.5.1
External Interrupts
..............................................................................................
3.6
System Control
............................................................................................................
3.6.1
OSC and PLL Block
............................................................................................
3.6.1.1
External Reference Oscillator Clock Option
....................................................
3.6.1.2
PLL-Based Clock Module
.........................................................................
3.6.1.3
Loss of Input Clock
................................................................................
3.6.2
Watchdog Block
.................................................................................................
3.7
Low-Power Modes Block
.................................................................................................
4
Peripherals
.......................................................................................................................
4.1
32-Bit CPU-Timers 0/1/2
.................................................................................................
4.2
Enhanced PWM Modules (ePWM1/2/3/4/5/6)
.........................................................................
4.3
Hi-Resolution PWM (HRPWM)
..........................................................................................
4.4
Enhanced CAP Modules (eCAP1/2/3/4)
...............................................................................
4.5
Enhanced QEP Modules (eQEP1/2)
....................................................................................
4.6
Enhanced Analog-to-Digital Converter (ADC) Module
...............................................................
4.6.1
ADC Connections if the ADC Is Not Used
..................................................................
4.6.2
ADC Registers
..................................................................................................
4.7
Enhanced Controller Area Network (eCAN) Modules (eCAN-A and eCAN-B)
....................................
2
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