Table 3-12 – Texas Instruments TMS320F2802 User Manual
Page 43
INT12
MUX
INT11
INT2
INT1
CPU
(Enable)
(Flag)
INTx
INTx.8
PIEIERx[8:1]
PIEIFRx[8:1]
MUX
INTx.7
INTx.6
INTx.5
INTx.4
INTx.3
INTx.2
INTx.1
From
Peripherals
or
External
Interrupts
(Enable)
(Flag)
IER[12:1]
IFR[12:1]
Global
Enable
INTM
1
0
PIEACKx
(Enable/Flag)
,
,
,
SPRS230N – OCTOBER 2003 – REVISED MAY 2012
Figure 3-8. Multiplexing of Interrupts Using the PIE Block
Table 3-12. PIE Peripheral Interrupts
(1)
PIE INTERRUPTS
CPU
INTERRUPTS
INTx.8
INTx.7
INTx.6
INTx.5
INTx.4
INTx.3
INTx.2
INTx.1
WAKEINT
TINT0
ADCINT
SEQ2INT
SEQ1INT
INT1
XINT2
XINT1
Reserved
(LPM/WD)
(TIMER 0)
(ADC)
(ADC)
(ADC)
EPWM6_TZINT
EPWM5_TZINT
EPWM4_TZINT
EPWM3_TZINT
EPWM2_TZINT
EPWM1_TZINT
INT2
Reserved
Reserved
(ePWM6)
(ePWM5)
(ePWM4)
(ePWM3)
(ePWM2)
(ePWM1)
EPWM6_INT
EPWM5_INT
EPWM4_INT
EPWM3_INT
EPWM2_INT
EPWM1_INT
INT3
Reserved
Reserved
(ePWM6)
(ePWM5)
(ePWM4)
(ePWM3)
(ePWM2)
(ePWM1)
ECAP4_INT
ECAP3_INT
ECAP2_INT
ECAP1_INT
INT4
Reserved
Reserved
Reserved
Reserved
(eCAP4)
(eCAP3)
(eCAP2)
(eCAP1)
EQEP2_INT
EQEP1_INT
INT5
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
(eQEP2)
(eQEP1)
SPITXINTD
SPIRXINTD
SPITXINTC
SPIRXINTC
SPITXINTB
SPIRXINTB
SPITXINTA
SPIRXINTA
INT6
(SPI-D)
(SPI-D)
(SPI-C)
(SPI-C)
(SPI-B)
(SPI-B)
(SPI-A)
(SPI-A)
INT7
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
I2CINT2A
I2CINT1A
INT8
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
(I2C-A)
(I2C-A)
ECAN1_INTB
ECAN0_INTB
ECAN1_INTA
ECAN0_INTA
SCITXINTB
SCIRXINTB
SCITXINTA
SCIRXINTA
INT9
(CAN-B)
(CAN-B)
(CAN-A)
(CAN-A)
(SCI-B)
(SCI-B)
(SCI-A)
(SCI-A)
INT10
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
INT11
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
INT12
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
(1)
Out of the 96 possible interrupts, 43 interrupts are currently used. The remaining interrupts are reserved for future devices. These
interrupts can be used as software interrupts if they are enabled at the PIEIFRx level, provided none of the interrupts within the group is
being used by a peripheral. Otherwise, interrupts coming in from peripherals may be lost by accidentally clearing their flag while
modifying the PIEIFR. To summarize, there are two safe cases when the reserved interrupts could be used as software interrupts:
1) No peripheral within the group is asserting interrupts.
2) No peripheral interrupts are assigned to the group (example PIE group 12).
Copyright © 2003–2012, Texas Instruments Incorporated
Functional Overview
43
Product Folder Link(s):