11 mac input vector register (macinvector), Section 5.11, Section 5.12 – Texas Instruments TMS320DM36X User Manual
Page 94
Ethernet Media Access Controller (EMAC) Registers
www.ti.com
5.11 MAC Input Vector Register (MACINVECTOR)
The MAC input vector register (MACINVECTOR) is shown in
and described in
.
Figure 50. MAC Input Vector Register (MACINVECTOR)
31
28
27
26
25
24
23
16
Reserved
STATPEND
HOSTPEND
LINKINT
USERINT
TXPEND
R-0
R-0
R-0
R-0
R-0
R-0
15
8
7
0
RXTHRESHPEND
RXPEND
R-0
R-0
LEGEND: R = Read only; -n = value after reset
Table 48. MAC Input Vector Register (MACINVECTOR) Field Descriptions
Bit
Field
Value
Description
31-28
Reserved
0
Reserved
27
STATPEND
0-1
EMAC module statistics interrupt (STATPEND) pending status bit.
26
HOSTPEND
0-1
EMAC module host error interrupt (HOSTPEND) pending status bit.
25
LINKINT
0-1
MDIO module link change interrupt (LINKINT) pending status bit.
24
USERINT
0-1
MDIO module user interrupt (USERINT) pending status bit.
23-16
TXPEND
0-FFh
Transmit channels 0-7 interrupt pending (TXPENDn) status bit. Bit 16 is transmit channel 0.
15-8
RXTHRESHPEND
0-FFh
Receive threshold channels 0-7 interrupt pending (RXTHRESHPENDn) status bit. Bit 8 is
receive channel 0.
7-0
RXPEND
0-FFh
Receive channels 0-7 interrupt pending (RXPENDn) status bit. Bit 0 is receive channel 0.
5.12 MAC End Of Interrupt Vector Register (MACEOIVECTOR)
The MAC end of interrupt vector register (MACEOIVECTOR) is shown in
and described in
.
Figure 51. MAC End Of Interrupt Vector Register (MACEOIVECTOR)
31
16
Reserved
R-0
15
2
1
0
Reserved
EOI
R-0
R/W-0
LEGEND: R = Read only; R/W = Read/Write; -n = value after reset
Table 49. MAC End Of Interrupt Vector Register (MACEOIVECTOR) Field Descriptions
Bit
Field
Value
Description
31-2
Reserved
0
Reserved
1-0
EOI
0-3h
End of interrupt.
0
End of interrupt processing for RXTHRESH interrupt.
1h
End of interrupt processing for RXPULSE interrupt.
2h
End of interrupt processing for TXPULSE interrupt.
3h
End of interrupt processing for Miscellaneous interrupt.
94
Ethernet Media Access Controller (EMAC)/Management Data Input/Output
SPRUFI5B – March 2009 – Revised December 2010
(MDIO)
© 2009–2010, Texas Instruments Incorporated