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50 network statistics registers, 1 good receive frames register (rxgoodframes), Section 5.50.1 – Texas Instruments TMS320DM36X User Manual

Page 123: Section 5.50.2, Section 5.50.3

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Ethernet Media Access Controller (EMAC) Registers

5.50 Network Statistics Registers

The EMAC has a set of statistics that record events associated with frame traffic. The statistics values
are cleared to zero 38 clocks after the rising edge of reset. When the MII bit in the MACCONTROL
register is set, all statistics registers (see

Figure 89

) are write-to-decrement. The value written is

subtracted from the register value with the result stored in the register. If a value greater than the
statistics value is written, then zero is written to the register (writing FFFF FFFFh clears a statistics
location). When the MII bit is cleared, all statistics registers are read/write (normal write direct, so
writing 0000 0000h clears a statistics location). All write accesses must be 32-bit accesses.

The statistics interrupt (STATPEND) is issued, if enabled, when any statistics value is greater than or
equal to 8000 0000h. The statistics interrupt is removed by writing to decrement any statistics value
greater than 8000 0000h. The statistics are mapped into internal memory space and are 32-bits wide.
All statistics rollover from FFFF FFFFh to 0000 0000h.

Figure 89. Statistics Register

31

16

COUNT

R/WD-0

15

0

COUNT

R/WD-0

LEGEND: R/W = Read/Write; WD = Write to decrement; -n = value after reset

5.50.1

Good Receive Frames Register (RXGOODFRAMES)

The total number of good frames received on the EMAC. A good frame is defined as having all of the
following:

Any data or MAC control frame that matched a unicast, broadcast, or multicast address, or matched
due to promiscuous mode

Was of length 64 to RXMAXLEN bytes inclusive

Had no CRC error, alignment error, or code error

See

Section 2.6.5

for definitions of alignment, code, and CRC errors. Overruns have no effect on this

statistic.

5.50.2

Broadcast Receive Frames Register (RXBCASTFRAMES)

The total number of good broadcast frames received on the EMAC. A good broadcast frame is defined
as having all of the following:

Any data or MAC control frame that was destined for address FF-FF-FF-FF-FF-FFh only

Was of length 64 to RXMAXLEN bytes inclusive

Had no CRC error, alignment error, or code error

See

Section 2.6.5

for definitions of alignment, code, and CRC errors. Overruns have no effect on this

statistic.

5.50.3

Multicast Receive Frames Register (RXMCASTFRAMES)

The total number of good multicast frames received on the EMAC. A good multicast frame is defined as
having all of the following:

Any data or MAC control frame that was destined for any multicast address other than
FF-FF-FF-FF-FF-FFh

Was of length 64 to RXMAXLEN bytes inclusive

Had no CRC error, alignment error, or code error

See

Section 2.6.5

for definitions of alignment, code, and CRC errors. Overruns have no effect on this

statistic.

123

SPRUFI5B – March 2009 – Revised December 2010

Ethernet Media Access Controller (EMAC)/Management Data Input/Output

(MDIO)

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