13 0x0c—timer restart register (timer_restar, 14 0x0d—timer enable register (timer_enable), 13 0x0c—timer restart register (timer_restart) – Rockwell SoniCrafter BT8960 User Manual

Page 62: 14 0x0d—timer enable register (timer_enable)

3.0 Registers

3.1 Conventions

Bt8960

Single-Chip 2B1Q Transceiver

N8960DSB

3.2.13 0x0C—Timer Restart Register (timer_restart)

Independent read/write restart bits, one for each of the eight internal timers. Setting an individual bit causes the
associated timer to be reloaded with the contents of its interval register. For the four symbol-rate timers (meter,
snr, t3, t4), reloading will occur within one symbol period. For the four startup timers (sut1–4), reloading will
occur within 1,024 symbol periods. Once reloaded, the restart bit is automatically cleared. If a restart bit is set
and then cleared (by writing a logic zero) before the reload actually takes place, no timer reload will occur.
Once reloaded, if enabled in the Timer Enable Register [timer_enable; 0x0D], the timer will begin counting
down toward zero; otherwise, it will hold at the interval register value.

General Purpose Timer 4

General Purpose Timer 3

snr

SNR Alarm Timer

meter

Meter Timer

sut4

Startup Timer 4

sut3

Startup Timer 3

sut2

Startup Timer 2

sut1

Startup Timer 1

3.2.14 0x0D—Timer Enable Register (timer_enable)

Independent read/write enable bits, one for each of the eight internal timers. When any individual bit is set, the
corresponding timer is enabled for counting down from its current value toward zero. For the four symbol-rate
timers (meter, snr, t3, t4), counting will begin within one symbol period. For the four startup timers (sut1-4),
counting will begin within 1,024 symbol periods. When an enable bit is cleared, the timer is disabled from
counting while it holds its current value. If an enable bit is set and then cleared before a count actually takes
place, no timer countdown will occur.