beautypg.com

Sierra Wireless DART 200 CDPD Modem User Manual

Page 33

background image

DART 200 CDPD Modem User’s Guide

2 Installation and Setup

PN1197-00 Revision 1.0

2-9

2.

If the NEI information is correct, use AT&V to verify the side
setting (\Nn) and channel restrictions (\Jn), for example:

ar&v

DART 200
Communication Port Settings:
Auto Baud: 9600 Baud, 8 Data Bits, No Parity, 1 Stop Bit(s)
E1 V1 Q0 F1 X1 &C1 &D0 &E1 &S0
\F3 \J0 \M0 \N3 \O0 \Q2 \T1 *A0 *B0 *C0 *G1 *K0 *R0 *T0
S00:000 S01:001 S02:043 S03:013 S04:010 S05:008 S06:127 S07:020 S08:250
S09:005 S10:080 S11:175 S12:050 S13:060 S14:074 S15:010 S16:050 S17:010
S18:010 S19:151 S20:000 S21:098 S22:016 S23:091 S24:140 S25:000 S26:003
S27:140 S28:140 S29:090 S30:010 S31:010 S32:005 S33:002 S34:001 S35:065
S36:041 S37:007 S38:003 S39:010 S40:090 S41:140 S42:080 S43:100 S44:023
S45:050 S46:005 S47:050 S48:050 S49:040 S50:020 S51:013 S52:026 S53:000
S54:000 S55:000 S56:000 S57:000 S58:058 S59:000 S60:001 S61:143 S62:000
S63:000 S64:022 S65:003 S66:002 S67:020 S68:020 S69:108 S70:010 S71:006
S72:005 S73:005 S74:006 S75:008 S76:240 S77:030 S78:000 S79:001 S80:250
S81:017 S82:002 S83:030 S84:000 S85:000 S86:120 S87:000 S88:020 S89:010
S90:008 S91:003 S92:000 S93:000 S94:000 S95:011 S96:000 S97:002 S98:090
S99:008

EID: 0020EB000B71

If this is the initial setup, the only parameter that changed from the
default value is the side preference specification (\N). Verify that it is
set to match your carrier before proceeding. Refer to Basic modem
personalization,
p. 2-6, for details.

3. If the modem has been used previously, then some of the profile

parameters and S-Registers might be altered. Check that the profile is
correct before proceeding to step 4.

4. If you made changes, save the new configuration with the AT&W

command before continuing.

Register representation

The DART 200 keeps its status and control information in S-Registers.
Many of its functions are controlled by bits within a register, and are
displayed as a numerical value. Figure 2-2 shows the register notation
used.

Figure 2-2. S-Register bit positions

S-Register

Bit Position

7

6

5

4

3

2

1

0

?

?

NOTE:
The bits are numbered
in high to low order
from left to right that is
the reverse of some
notation systems in
wide use.