Samsung MUXONENAND A-DIE KFM2G16Q2A - Manual (Page 157)

MuxOneNAND2G(KFM2G16Q2A-DEBx)
- 157 -
FLASH MEMORY
MuxOneNAND4G(KFN4G16Q2A-DEBx)
6.14 2X Cache Program Operation Timing
1st da
ta
inpu
t
2nd dat
a
input
2X cache
progr
am Command
AD
Q0
~
A
1,
A
2
, A3 : Address of Dat
aR
A
M to be written
INT
: I
ndicator
for Dat
aRAM’
s S
ta
tus (
R
eady=Hig
h, Busy=Low)
Ongoing S
tatus : Indica
ted by OnGo bit in
Contr
oller S
tatus Register [15] (
F
240
h)
4K
B d
at
a input : Asynch W
rite
/ Synch W
rite
available.
Command input and I
N
T pin behavior is b
ased o
n ‘IN
T
auto mo
de’.
In ‘IN
T
manual mode’, wr
iting ‘0’ to
inter
rupt r
egister
is re
quir
ed befor
e co
mmand issue.
AD
Q1
5
A1
A2
High-
Z
INT
.
...
.
.
.
.
4KB
d
at
a into
2 D
at
aRAMs
4
K
B da
ta
in
to
2
Dat
aRAMs
2X Cache pr
ogram C
ommand
2X prog
ram Comman
d
3nd dat
a
in
put
A3
4KB dat
a into
2 Dat
aR
A
Ms
.
..
O
ngoing
S
ta
tu
s
Contr
oller S
tatus Register Ch
eck
Plane
1 / Plane
2 cur
rent :
Invalid
Plane
1 / Plane
2 previ
ous: Pass=0, Fail=1
Controller S
tatus Register
Check
P
lane1 /
P
lane2 cur
rent : Pass=
0,
Fail=1
P
lane1 /
P
lane2 p
revious: Pass=0, F
ail=1
Contr
oller
S
tatu
s Re
gister C
heck
Plane1 / Plane2 curre
nt : Invalid (F
ixed to 0
)
Plane1 / Plane2 pre
vious: Inva
lid (F
ixed to 0)